Abstract: Artificial intelligence (AI) edge devices increasingly require the enhanced accuracy of floating-point (FP) multiply-and-accumulate (MAC) operations as well as nonvolatile on-chip memory to ...

Abstract: In this work, we propose an energy-efficient 64$\times $ 64 compute-in-memory (CIM) SRAM macro using a 7T bit-cell in 65nm CMOS UMC PDK. It supports 4-bit inputs, 4-bit weights & 4-bit ...